QS1R Receiver is 100% comptatible to SRL QuickSilver QS1R Receiver

SchemaThe QS1R Receiver is the most advanced software direct sampling receiver on the market.  It features a Linear Technologies LTC2208 16 bit, 130 MSPS Analog Digital Converter (ADC) and an Altera EP3C25 Cyclone III FPGA.   Connectivity to the PC is through a high speed USB 2.0 interface.  QS1R covers 10 kHz through 62.5 MHz in its standard configuration and can be used in undersampling applications to 500 MHz.   

The  QS1R Receiver features a high performance FPGA with plenty of extra capacity for future expansion.  Two or four independent receiver chains sharing the ADC anywhere within the 15 kHz - 62 MHz range is one possibility.  Unlike other DDC type Software Defined Radios that use a dedicated DDC chip or an inadequately sized FPGA, QS1R allows future expansion, room for experimentation, and upgrades because of its generous Cyclone III FPGA with many DSP resources.  

The firmware, software, and FPGA HDL for the QS1R Receiver is available for experimentation and writing your own custom application.  You can view, change, improve, and experiment with the receiver's code.  Since the majority of the QS1R's functionality is within the FPGA, a new, updated radio is just a download away.

 

- QS1R RevD 10kHz to 62.5 MHz receiver with up to 2 MHz bandwidth
- DAC Audio output for minimum latency
- External Hardware Mute Input
- Windows/OSX/Linux software
- Skim up to 7 Ham bands at once with CW Skimmer Server!

 

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